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| Datasheet File OCR Text: |
| 1 p x f s . 0 4 ' & 5 763 11
4 ( 4 ( % % % % 4 0 1 5 0 1 7 * & 8 pin number pin name function 1 3 2 s1 s2 g1 source source gate 4 7~8 5~6 g2 d1 d2 gate drain drain ( f o f s b m % f t d s j q u j p o ' f b u v s f t 1 j o $ p o g j h v s b u j p o & r v j w b m f o u $ j s d v j u " c t p m v u f . b y j n v n 3 b u j o h t 1 j o " t t j h o n f o u " q q m j d b u j p o t n-channel power mos fet dmos structure low on-state resistance : 0.035 ? (max) ultra high-speed switching sop-8 package two fet devices built-in notebook pcs cellular and portable phones on-board power supplies li-ion battery systems the XP133A1235SR is an n-channel power mos fet with low on- state resistance and ultra high-speed switching characteristics. two fet devices are built into the one package. because high-speed switching is possible, the ic can be efficiently set thereby saving energy. the small sop-8 package makes high density mounting possible. low on-state resistance : rds (on) = 0.035 ? ( vgs = 4.5v ) : rds (on) = 0.048 ? ( vgs = 2.5v ) ultra high-speed switching operational voltage : 2.5v high density mounting : sop-8 / $ i b o o f m . 0 4 ' & 5 ' & 5 e f w j d f t c v j m u j o ta=25 o c symbol ratings units vdss 20 v vgss + 12 v id 6 a idp 20 a idr 6 a pd 2 w tch 150 o c tstg - 55 ~ 150 o c ( note ) : when implemented on a glass epoxy pcb storage temperature reverse drain current continuous channel power dissipation (note) channel temperature drain - source voltage gate - source voltage drain current (dc) drain current (pulse) parameter 4 @ 9 1 " 4 3 1 . ?? 9 1 " 4 3 764 11 & m f d u s j d b m $ i b s b d u f s j t u j d t dc characteristics ta=25 c parameter symbol conditions min typ max units drain cut-off current idss vds = 20v , vgs = 0v 10 a gate-source leakage current igss vgs = 12v , vds = 0v 1 a gate-source cut-off voltage vgs (off ) id = 1ma , vds = 10v 0.5 1.2 v drain-source on-state resistance id = 3a , vgs = 4.5v 0.026 0.035 ? ( note ) id = 3a , vgs = 2.5v 0.035 0.048 ? forward transfer admittance ( note ) body drain diode forward voltage ( note ) : effective during pulse test. dynamic characteristics ta=25 c parameter symbol conditions min typ max units input capacitance ciss 760 pf output capacitance coss vds = 10v , vgs = 0v 430 pf feedback capacitance crss f = 1 mhz 200 pf switching characteristics ta=25 c parameter symbol conditions min typ max units turn-on delay time td ( on ) 10 ns rise time tr vgs = 5v , id = 3a 20 ns turn-off delay time td ( off ) vdd = 10v 55 ns fall time tf 15 ns thermal characteristics parameter symbol conditions min typ max units thermal resistance implement on a glass epoxy ( channel-ambience ) resin pcb c / w 62.5 rth ( ch-a ) vf if = 7a , vgs = 0v v 0.85 1.1 id = 4a , vds = 10v | yfs | rds ( on ) s14 4 @ 9 1 " 4 3 1 . ?? 9 1 " 4 3 5 z q j d b m 1 f s g p s n b o d f $ i b s b d u f s j t u j d t 5 b ? 1 v m t f 5 f t u 7 7 7 7 7 e t 7 1 v m t f 5 f t u ? ? 5 b ? 1 v m t f 5 f t u " * e " % s b j o 4 p v s d f 7 p m u b h f 7 e t 7 ( b u f 4 p v s d f 7 p m u b h f 7 h t 7 ( b u f 4 p v s d f 7 p m u b h f 7 h t 7 % s b j o $ v s s f o u * e " drain current vs. drain-source voltage drain current vs. gate-source voltage drain-source on-state resistance vs. gate-source voltage drain-source on-state resistance vs. drain current % s b j o 4 p v s d f 0 o 4 u b u f 3 f t j t u b o d f 3 e t p o % s b j o 4 p v s d f 0 o 4 u b u f 3 f t j t u b o d f 3 e t p o 7 h t 7 7 5 b ? 1 v m t f 5 f t u % s b j o $ v s s f o u * e " 7 7 7 h t 7 7 5 b ? % s b j o $ v s s f o u * e " " n c j f o u 5 f n q 5 p q s ? " n c j f o u 5 f n q 5 p q s ? drain-source on-state resistance vs. ambient temperature 1 v m t f 5 f t u gate-source cut-off voltage variance vs. ambient temperature 7 e t 7 * e n " 7 h t 7 7 " " * e " " ( b u f 4 p v s d f $ v u 0 g g 7 p m u b h f 7 b s j b o d f 7 h t p g g 7 b s j b o d f 7 % s b j o 4 p v s d f 0 o 4 u b u f 3 f t j t u b o d f 3 e t p o 765 11 4 @ 9 1 " 4 3 1 . ?? 9 1 " 4 3 766 11 $ b q b d j u b o d f $ q ' $ p t t $ j t t $ s t t 4 x j u d i j o h 5 j n f u o t u s u e p o u e p g g u g % s b j o 4 p v s d f 7 p m u b h f 7 e t 7 % s b j o $ v s s f o u * e " capacitance vs. drain-source voltage 7 h t 7 g . ) [ 5 b ? switching time vs. drain current 7 h t 7 7 e e 7 1 8 t e v u z 5 b ? 3 f w f s t f % s b j o $ v s s f o u * e s " standardized transition thermal resistance vs. pulse width 3 u i d i b ? 8 * n q m f n f o u f e p o b h m b t t f q p y z 1 $ # 1 v m t f 8 j e u i 1 8 t 4 u b o e b s e j [ f e 5 s b o t j u j p o 5 i f s n b m 3 f t j t u b o d f t u 4 j o h m f 1 v m t f 4 p v s d f % s b j o 7 p m u b h f 7 t e 7 gate-source voltage vs. gate charge reverse drain current vs. source-drain voltage 1 v m t f 5 f t u 5 b ? 7 7 7 h t 7 7 7 e t 7 * e " 5 b ? ( b u f 4 p v s d f 7 p m u b h f 7 h t 7 ( b u f $ i b s h f 2 h o d 4 @ 9 1 " 4 3 1 . ?? |
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